1. Field of the Invention
The invention relates to package. In particular, the invention relates to a package structure having interlaced pins and an electronic apparatus including such package structure could increase the minimum spacing between the adjacent pins to lower the difficulty of the package process. In addition, since the routing of the printed circuit board can directly penetrate the bottom of the package structure, therefore, the design of the printed circuit board will become simpler and easier. Especially, the circuits sensitive to loads or layout (e.g., a high-speed signal circuit) will be deeply affected.
2. Description of the Prior Art
In recent years, with the innovation and development of the electronic technology, various kinds of electronic apparatuses with different functions are shown on the market. In these electronic apparatuses, the printed circuit board and its package structure have very important applications. Please refer to FIG. 1A. FIG. 1A shows a scheme diagram of a package structure 1 of a printed circuit board 10 in a conventional electronic apparatus.
As shown in FIG. 1A, pins P1˜P10 are disposed on the printed circuit board 10, wherein, the pins P1˜P5 are disposed at a first side of the printed circuit board 10, and the pins P6˜P10 are disposed at a second side of the printed circuit board 10, and the first side corresponds to the second side. It should be noticed that the pins P1˜P5 disposed at the first side of the printed circuit board 10 and the pins P6˜P10 disposed at the second side of the printed circuit board 10 are symmetrically aligned. Therefore, a straight line M in FIG. 1A will pass the pin P1 at the first side of the printed circuit board 10 and the pin P2 at the second side of the printed circuit board 10.
More specifically, the pin P1 at the first side of the printed circuit board 10 is opposite to the pin P2 at the second side; the pin P3 at the first side is opposite to the pin P4 at the second side; the pin P5 at the first side is opposite to the pin P6 at the second side; the pin P7 at the first side is opposite to the pin P8 at the second side; the pin P9 at the first side is opposite to the pin P10 at the second side.
Please refer to FIG. 1B. FIG. 1B shows a scheme diagram of the layout of the printed circuit board 10 in a conventional electronic apparatus shown in FIG. 1A. As shown in FIG. 1B, since the pins P1˜P5 disposed at the first side of the printed circuit board 10 and the pins P6˜P10 disposed at the second side of the printed circuit board 10 are symmetrically aligned, therefore, as to each pin disposed on the printed circuit board 10, the routing coupled to each pin respectively should be bended to dodge the opposite pin.
For example, the routing L1 coupled to the pin P1 must be bended to dodge the pin P2 opposite to the pin P1. Similarly, the routing L2 coupled to the pin P2 must also be bended to dodge the pin P1 opposite to the pin P2. And, the conditions of the routing L3 coupled to the pin P3 and the routing L4 coupled to the pin P4 are similar, so that it will not be described again here.
It should be noticed that when the package structure 1 of the printed circuit board 10 is designed, there will be a minimum spacing limitation between the adjacent package pins (e.g., between the pins P1 and P3, or between the pins P2 and P4). When the minimum spacing limitation becomes smaller and smaller, the entire package process will become more difficult. Moreover, since each pin disposed on the printed circuit board 10 must be bended to dodge the opposite pin, the routings of the printed circuit board 10 fail to penetrate the bottom of the package structure 1, therefore, it is quite inconvenient to the design of the printed circuit board 10 of the client end.